Registro de dezplamiento carga paralela - salida serial (PISO)y clock INH.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY piso IS
PORT( Data_IN: IN std_logic_vector(7 DOWNTO 0);
CLK, CLK_INH, SH_nLD: IN std_logic;
QH, nQH: OUT std_logic);
END piso;
ARCHITECTURE description OF piso IS
SIGNAL Data_Temp: std_logic_vector(7 DOWNTO 0):="00000000";
SIGNAL Q_Temp: std_logic :='0';
SIGNAL i: integer:=0;
BEGIN
PROCESS(CLK, CLK_INH, SH_nLD)
BEGIN
IF SH_nLD='0' THEN
Data_Temp<=Data_IN;
i<=0;
ELSE
--DESPLAZAMIENTO
IF CLK_INH ='1' THEN
Q_Temp<=Q_Temp;
ELSIF CLK='1' and CLK'event THEN
Q_Temp<=Data_Temp(i);
i<=i+1;
END IF;
END IF;
END PROCESS;
QH<=Q_Temp;
nQH<= NOT Q_Temp;
END description;
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